The mixing of heterogeneous chiplets into a sophisticated bundle, coupled with the growing digitalization of a number of business segments, is pushing digital twins to the forefront of design.
The problem in these advanced assemblies is determining the potential tradeoffs between completely different chiplets, completely different meeting approaches, and to have the ability to do it shortly sufficient to nonetheless hit market home windows. This consists of the plain energy, efficiency, and space/price tradeoffs, however it additionally more and more consists of mechanical engineering, the impression of assorted manufacturing processes on completely different supplies, and the necessity to each zoom in and zoom out on completely different segments of a design.
“Consider the transformation that the mobile phone has introduced into our lives, as has the present-day migration to EVs,” mentioned Sherry Hess, senior product administration group director for multi-physics system evaluation merchandise at Cadence. “These merchandise aren’t solely feats of digital engineering, however of mechanical engineering, too. Electronics discover themselves in new and novel varieties, whether or not a foldable cellphone or a flying automotive. Right here, engineering domains should co-exist and collaborate to result in one of the best end-product attainable.”
The entire prime EDA firms have embraced multi-physics as a approach of leveraging their instruments past simply chips, with a heavy give attention to large-scale simulations. “What about drop testing, aerodynamics and aero-acoustic results? These largely CFD and/or mechanical multi-physics phenomena additionally have to be accounted for,” Hess mentioned. “Then, how does the drop testing impression {the electrical} efficiency? The world of electronics and its huge array of finish merchandise is pushing us past pure electrical engineering to be extra broadly minded and develop not solely heterogeneous merchandise, however heterogeneous engineering groups, too.”
Connecting physics processes and information collectively throughout the consumer ecosystem is named chaining. “In automotive design, chaining in a welding-to-crash simulation implies that we are able to do the very fantastic simulation of the welding course of, addressing completely different parameters, and keep in mind the results of the simulation into crash so as to see if the weld will fail in a crash,” mentioned Emmanuel Leroy, chief product and know-how officer for the ESI Group at Keysight. “By doing this we are able to regulate and refine the kind of weld we need to use, the method parameters, the variety of spot welds. That is breaking silos in OEMs organizations, and it consists of concurrent engineering ideas resembling how we do manufacturing and engineering collectively.”
Quite a few industries, like automotive, have extensively used digital twins to construct mechanical methods. “What’s altering is that persons are reworking all of this into merchandise that use electronics,” mentioned Marc Serughetti, vice chairman, product administration and functions engineering at Synopsys. “They use electronics as a result of it’s extra environment friendly from an vitality standpoint, it’s safer, or it has the power to be upgraded. All of these merchandise are evolving towards electronics, and extra importantly, towards software-defined merchandise. That offers them the power to vary the capabilities, and to herald new capabilities together with this totally new enterprise mannequin. That’s the development out there — software-defined merchandise. So fascinated by the digital twin in that context, if all of that is performed with electronics, why don’t we now have a digital twin a part of the electronics? Then, the way you deliver these issues in turns into actually essential. All of this pertains to a market that does management methods, wherein you’re one thing within the bodily world and making an attempt to manage it. If you wish to validate or perceive what’s occurring, it means it’s important to simulate the electronics within the context of the system.”
Digital twins additionally open the door to architectural exploration, whereby engineering groups can study a number of issues concurrently to see how they behave collectively, and what occurs if one thing is modified in a single a part of the structure.
“The final time we had a bodily illustration in EDA was Rubylith, however since then all the pieces’s digital and digital,” mentioned Neil Hand, product advertising director at Siemens EDA. “We’ve gone from domain-specific digital twins to extra inclusive ones, and we’ve linked in manufacturing and gotten greater and greater. Now we’re beginning to say we’ve received a chip-level digital twin, then we’ve received the 3D-IC, which is beginning to deliver mechanical and thermal into it, and we’re going to get to the product degree. You can begin to take a look at the tradeoffs. You are taking a best-case state of affairs in the present day wherein somebody desires to do a customized semi for a singular utility. You’re a methods home, you’ve received all the cash on this planet, you’re affected person. You’ve gotten an structure, you’re writing up a spec, giving it to your IC group or to a unique IC group. You’re plodding alongside, happening the V, and everybody’s doing their implementation. Then you definately’re placing all of it again collectively and hoping it really works. As soon as we now have a extra linked, totally interoperable digital twin, you can begin to make tradeoffs.”
Fig. 1: Product lifecycle administration utilizing digital twin method. Supply: Siemens EDA
It is a huge shift, enabled by extra and higher information, coupled with considerably extra compute energy. “That is going to be an evolution — however a revolution on the similar time — as a result of now we now have to deliver the electronics in, and instantly the electronics are 50% of the product,” Serughetti mentioned. “You may’t ignore that half, and connecting these two worlds in some sort of system is important. We discover this in automotive. At the moment, all people’s speaking about automotive, however it additionally occurs in aerospace and protection, in addition to industrial. In an digital product, there are three stuff you’re doing. You’re controlling one thing, you’re sending data, otherwise you’re speaking that data to someone via a UI. These are the essential capabilities, and we now have to do that in a secure approach in a safe approach. How do you validate all these issues, particularly the digital elements, in that context?”
Digital twins and shift left
EDA firms agree that digital twins are mandatory for progress in a number of business sectors. “It’s important to have digital twins,” mentioned John Ferguson, director of product administration at Siemens EDA. “You may’t get there blindly with out it anymore, and you’ll’t do it and not using a shift left method. They go hand in hand. On the subject of system design —significantly in 3D, and the elements of 3D the place you’ve got multi-physics concerned — then it will get particularly tough, as a result of you’ve got interdependencies amongst all the pieces.
The essential ideas right here aren’t new. “We’ve had this idea of digital twin for a while, however they’re actually scoped as particular person elements that may be handled independently, and now we are able to’t do this anymore,” Ferguson mentioned. “Thermal impacts stress. Stress and thermal impression electrical conduct. However electrical conduct impacts thermal. That places an additional onus on digital twins, and you’ll’t keep away from having to do that view of the world the place you perceive the intricate interplays and account for them as you go. This additionally implies the shift left facet of it. It’s not only a ‘one and performed’ anymore. It’s important to consider all of it collectively. That’s the entire nutshell we’re making an attempt to thaw right here.”
Cadence’s Hess gave the instance of the newest push for higher-performing HBMs and AI information heart enlargement. “These high-bandwidth recollections are rising from a number of layers to 12. These layered electronics are powered, and energy creates warmth. Warmth must be understood, and thus thermal integrity points uncovered alongside the best way should addressed. However the electronic-thermal points are simply the primary domino in a series of interdependencies. What concerning the thermal stress and/or warpage that may be brought on by the powering of those stacked units? And the way does that then lend to mechanical stress and even materials fatiguing because the temperature cycles excessive and low although the usage of the digital system? This is only one instance in an extended listing of many.”
Digital twins additionally will probably be important for the adoption of chiplets, the place completely different chiplets will be swapped out and in to find out the impression on the conduct of a multi-chiplet system.
“New multi-chiplet designs are being developed now for the following technology of AI accelerators, CPUs, and networking chips,” mentioned Tony Chan Carusone, CTO at Alphawave Semi. “These designs combine the newest CMOS logic applied sciences with reminiscence and connectivity chiplets, and generally further peripheral chiplets, all throughout the similar bundle. They push the boundaries of thermal warmth dissipation, sign integrity, energy integrity, mechanical reliability, and logic efficiency. Every issue can work together with and have an effect on the others, making it difficult to optimize a design. As an illustration, an enchancment in sign integrity may compromise mechanical stability, or repartitioning logic throughout chiplets for efficiency positive aspects may result in localized heating points, affecting reliability.”
What’s essential to notice is that digital twins are a part of a dynamic course of. “It’s not a single step,” famous Lang Lin, principal product supervisor at Ansys. “In a chip simulation, we get all the info from the simulation. However for the manufacturing course of, it’s completely different. You’ve gotten your substrate prepared and also you begin to solder one other one on prime of it, however you enhance the temperature to in all probability 300 levels to connect the 2 chiplets to one another. Then you definately cool it down. Then there’s an annealing course of, all the way down to maybe minus 40 levels. Then the following step is available in, you set extra die on prime of the opposite. Digital twin is a superb idea to emulate every step one-by-one. It has to seize the standing on the finish of every step and use that because the preliminary situation for the following step, and that challenges our conventional simulation instruments.”
That is very completely different from the normal simulation for a mechanical course of, like a automotive or an airplane. “You’ve gotten the mechanical half assembled collectively and the engine begins working, so that you’re going to see if there may be any warpage or if there are any mechanical failures,” Lin mentioned. “However that’s the outdated days. Within the outdated days we have been coping with greater than millimeter measurement. It was a meter, or many meters. Now we’re shifting all the way down to nanometer sizes, and that’s trigger for novel mechanical modeling approaches and new materials science to construct an answer. The state-of-the-art mechanical simulation proper now will be zooming into the micrometer scale. Let’s say two dies join to one another. Perhaps the bump pitch is about 40 micrometers. You mannequin the bumps, or micro-bumps — 1000’s or thousands and thousands of them. You may see the connection issues by constructing the entire mannequin in micrometers. Within the subsequent 5 years, the issue goes contained in the die, the place it’s good to see the construction of Steel-1, Steel-2, By way of-3, for instance, and right here’s my tiny transistor. It’s that degree of nanometer scale. We work carefully with foundries to allow that form of mechanical simulation. That is purely on the innovative. On the finish of the day, you anticipate a structural mannequin of vias, TSVs, and wires that might be seen out of your tiny little simulation engine, or the GUI. You will notice these constructions.”
EDA tooling for digital twins/system co-design
To make all of this work requires some modifications in EDA tooling. How linked are EDA instruments in the present day to comprehend the complete capabilities of digital twins/system co-design?
Synopsys’ Serughetti mentioned the very first thing to take a look at on this context is what is required, and what’s the drawback to be solved. “If I had a super-fast RTL simulation that enables me to run Android or one other software program stack, and execute that in 10 seconds besides Android, how nice would that be? Sadly, it’s not the truth,” he mentioned. “We’ve been in simulation for a few years, and everyone knows that there are two paradigms — abstraction and efficiency. The 2 don’t like one another very a lot. If it’s too correct, it’s not quick sufficient. Whether it is quick, it’s not correct sufficient. In case you take a look at the kind of know-how, that’s going to vary from an RTL simulation that has its personal function, emulation, throughout to a digital ECU, the place the {hardware} can nearly be abstracted to only receiving a CAD message. That’s what I care about. It’s a illustration of the {hardware} saying the scan, which may be very abstracted, can run actually quick. However for the engineer who’s making an attempt to see if there’s an issue within the CAN driver or the CAN interface, that’s not going to be ok. That’s not correct sufficient.”
The answer is healthier information integration. “There’s a slew of know-how that exists on this space that’s beginning to be linked,” Serughetti mentioned. “As such, use circumstances have gotten extraordinarily essential. You’re going to have individuals who take a look at efficiency and energy validation. How is that this doing? You’re not doing this on a really extremely abstracted mannequin. You want issues like an emulation platform to do this sort of validation — to run sufficient software program and be quick sufficient. And one other engineer, who’s testing the applying software program in that context, doesn’t actually care concerning the underlying {hardware}. To allow them to go to a software-abstracted illustration of the electronics.”
To make all of this occur, the instruments must work collectively, too.
“That is the crux of it, as a result of this stuff are so intertwined,” mentioned Siemens’ Ferguson. “We don’t have a option to remedy it as soon as. It’s important to iterate via. We’ve to do a multi-solve method each time, which makes it very difficult and really troublesome. How do you do this? How do you do this in a approach that’s constant throughout all elements of what it’s good to take a look at, without delay? It’s fairly daunting.”
Ferguson sees the semiconductor design ecosystem doing a greater job of recognizing what continues to be excellent, however the integration wants enchancment. “How can we tie them collectively? And the way can we get to a degree the place all people agrees on learn how to tie these issues collectively? If all people has an answer, however each resolution provides a unique reply, then we’re not in place. Nonetheless, the entire EDA suppliers are placing collectively their options. But it surely’s obscure what’s the proper reply.”
Usually, chipmakers evaluate the outcomes to a product that has been out there for some time frame. “However simply since you’ve been utilizing it for some time and also you haven’t seen gross failure from it, doesn’t imply it’s correct,” Ferguson mentioned. “It’s a really tough state of affairs at occasions. It’s important to resolve what’s the golden. You are able to do some issues with measurements on silicon numerous alternative ways. You may measure temperatures on the silicon, you are able to do issues to measure stresses on silicon, you’ll be able to measure {the electrical} behaviors on silicon. However all of these have inaccuracies in-built, due to how your chip behaves and fluctuates throughout the wafer. You may get a nasty lot. How have you learnt that’s the one to go off of, versus a unique chip on the identical wafer or in a unique batch of wafers? It’s very tough. We’re all within the state of affairs the place that is one thing comparatively new, so how do we all know? All of us might get in all probability not tremendous completely different solutions, however completely different nonetheless. How do you resolve which one you’re going to depend on? I don’t know the way we remedy that facet of issues. In the end, it comes all the way down to your producer. What did they resolve is their reference or golden? You’ve received to belief they’re doing the precise work, and no matter instruments meet their necessities of accuracy and are licensed, go together with that however nonetheless be ready. There may be one thing that all of us missed alongside the best way, and we return to the drafting board another time.”
The large image
The chip business acknowledges the worth of digital twins, significantly at superior nodes and in heterogeneous assemblies tied to particular domains. The problem now’s optimizing the entire instruments to work collectively quicker however with the identical or higher accuracy than up to now.
“We see from clients that it’s extra collaboration between simulation and AI,” mentioned Keysight’s Leroy. “We speak quite a bit about hybrid AI and hybrid digital twins and accelerating simulation, however the democratic resolution of simulation is basically coming from a mixture of AI and simulation. We don’t need to begin from zero like up to now, the place you are taking massive information, you set in a number of AI, then you definately don’t want any physics. You need to have good information, so that you want the physics, and also you increase that with information and AI to make the precise resolution.”
This all occurs on the confluence {of electrical}, mechanical, and CFD. Alphawave’s Chan Carusone believes that with the complete realization of digital twin know-how, it is going to be attainable to take a holistic view of advanced chiplet designs, enabling the co-optimization of price, energy, efficiency, and reliability. However between at times, there may be a number of work required to make this a actuality.
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